Larrabee is the codename for a cancelled GPGPU chip that Intel was developing separately from its current line of integrated graphics accelerators. It is named after either Mount Larrabee or Larrabee State Park in Whatcom County, Washington, near the town of Bellingham. The chip was to be released in 2010 as the core of a consumer 3D graphics card, but these plans were cancelled due to delays and disappointing early performance figures. The project to produce a GPU retail product directly from the Larrabee research project was terminated in May 2010 and its technology was passed on to the Xeon Phi. The Intel MIC multiprocessor architecture announced in 2010 inherited many design elements from the Larrabee project, but does not function as a graphics processing unit; the product is intended as a co-processor for high performance computing.
Almost a decade later, on June 12, 2018; the idea of an Intel dedicated GPU was revived again with Intel's desire to create a discrete GPU by 2020. This project would eventually become the Intel Xe and Intel Arc series, released in September 2020 and March 2022, respectively - but both were unconnected to the work on the Larrabee project.
Project status
On December 4, 2009, Intel officially announced that the first-generation Larrabee would not be released as a consumer GPU product. Instead, it was to be released as a development platform for graphics and high-performance computing. The official reason for the strategic reset was attributed to delays in hardware and software development. On May 25, 2010, the Technology@Intel blog announced that Larrabee would not be released as a GPU, but instead would be released as a product for high-performance computing competing with the Nvidia Tesla.
The project to produce a GPU retail product directly from the Larrabee research project was terminated in May 2010. The Intel MIC multiprocessor architecture announced in 2010 inherited many design elements from the Larrabee project, but does not function as a graphics processing unit; the product is intended as a co-processor for high performance computing. The prototype card was named Knights Ferry, a production card built at a 22 nm process named Knights Corner was planned for production in 2012 or later.
Comparison with competing products
Larrabee can be considered a hybrid between a multi-core CPU and a GPU, and has similarities to both. Its coherent cache hierarchy and x86 architecture compatibility are CPU-like, while its wide SIMD vector units and texture sampling hardware are GPU-like.
As a GPU, Larrabee would have supported traditional rasterized 3D graphics (Direct3D & OpenGL) for games. However, its hybridization of CPU and GPU features should also have been suitable for general purpose GPU (GPGPU) or stream processing tasks. For example, it might have performed ray tracing or physics processing, in real time for games or offline for scientific research as a component of a supercomputer.
Larrabee's early presentation drew some criticism from GPU competitors. At NVISION 08, an Nvidia employee called Intel's SIGGRAPH paper about Larrabee "marketing puff" and quoted an industry analyst (Peter Glaskowsky) who speculated that the Larrabee architecture was "like a GPU from 2006". By June 2009, Intel claimed that prototypes of Larrabee were on par with the Nvidia GeForce GTX 285. Justin Rattner, Intel CTO, delivered a keynote at the Supercomputing 2009 conference on November 17, 2009. During his talk he demonstrated an overclocked Larrabee processor topping one teraFLOPS in performance. He claimed this was the first public demonstration of a single-chip system exceeding one teraFLOPS. He pointed out this was early silicon, thereby leaving open the question on eventual performance for the architecture. Because this was only one fifth that of available competing graphics boards, Larrabee was cancelled "as a standalone discrete graphics product" on December 4, 2009.
Differences with contemporary GPUs
Larrabee was intended to differ from older discrete GPUs such as the GeForce 200 Series and the Radeon 4000 series in three major ways: It was to use the x86 instruction set with Larrabee-specific extensions. It was to feature cache coherency across all its cores. It was to include very little specialized graphics hardware, instead performing tasks like z-buffering, clipping, and blending in software, using a tile-based rendering approach.