The TENET 210 was a mainframe computer designed for timesharing services. The machine was designed for high throughput and expandability, including 20 direct memory access (DMA) channels and eight slots for core memory, allowing up to 128k 32-bit words of RAM. The sales materials boasted that it guaranteed user responses within one second.
The 210 was the only product of TENET Inc, formed by several former members of Fairchild Semiconductor during its heyday in the late 1960s. The company sold only a single 210 before going out of business.
History
The TENET 210 ultimately traces its history to a project within Fairchild Semiconductor's research and development center in Palo Alto, California run by Gordon Moore. A new group organized by Rex Rice was developing a machine specifically for the timesharing market. Known as the Symbol IIR, the design concept was a machine that ran a PL/1-like language as its native assembler language, and would be implemented entirely in hardware - no microcode or firmware was allowed.
In 1966, Chuck Runge was working for the Atomic Energy Commission, writing programs on a machine at Iowa State University. Rice visited the campus on a recruiting drive and Runge interviewed with Moore that March. Runge joined the company in June, but quickly became disillusioned with the no-software decree, and was convinced the project would never ship. He found a like-minded engineer in Dave Masters, who knew Fairchild president Bob Noyce.
The two approached Noyce with the idea of developing a new computer design. The system was initially pitched as a controller for Fairchild Instrumentation's new Sentry product, a software-controlled semiconductor testing system. This produced the 24-bit Fairchild FST-1, as well as the FACTOR programming language used to program the test suites. Although it was by most measures a general-purpose minicomputer, Fairchild was uninterested in marketing it as such.
At the time, the timesharing market was developing rapidly, and had split into two solution classes; the minicomputer end was aimed at smaller users who would buy a complete system for in-house use, like the HP 2100, while at the other end were large mainframes that sold services on a per-minute basis to users on remote computer terminals, like the GE 635. In 1968, Runge and Masters left Fairchild to form TENET with the intent of building a mid-range system with the price of the mini offerings but the power of the mainframes.
To fund development, Runge took a contract with Fairchild to develop the specification for FACTOR. When this was complete, they managed to arrange a 1969 meeting with Fred Adler, a NY trial attorney who had helped fund Data General. Adler put together a $2 million package to fund the development of two prototypes. Development of the first machine was completed within two years. To introduce the design, in January 1971 they held an open house in which a concert pianist used the prototype as a music synthesizer. However, the company had the bad fortune of launching sales directly into the leading edge of the 1973–1975 recession, and further funding was not available.
Tymshare examined the machine as a replacement for the SDS 940s, and Hewlett-Packard as a replacement for their initial failed effort for what became the HP 3000, but neither effort was successful. The company's one and only sale was a bid in response to a State of California request for proposal for a machine to support their civil engineering teams designing roads and bridges. They won the bid although by this time the company was already in Chapter 11 protection, maintaining the machine through a separate contract that later included the purchase of the original prototype to use as a parts machine. This machine was only retired in the 1980s.
Design
The basic concept arranged the machine around a high-performance memory bus they referred to as the "data exchange". In the 200-series design, the only one to be built, there were two independent 32-bit busses. Each could perform a read and a write at the same time, as long as they were to different locations in memory. In total, the bus could provide 20 MB/sec bandwidth. Core memory was connected on one side of the bus, with up to eight modules of 8 to 16k words each. Fully expanded, a system could have 8 x 16 = 128 kWords, or 512 kB.
