Sigrity, acquired by Cadence Design Systems in 2012 for $80M, supplies software for IC package physical design and for analyzing power integrity, signal integrity and design stage electromagnetic interference (EMI). Analysis is performed on chips, IC packages and printed circuit boards.
Overview
Sigrity began operations with a 1997 award from the National Science Foundation for simulation using electromagnetic computation techniques targeting electronic structures with hybrid solver techniques. The IC package physical layout product line was acquired from Synopsys in 2006.
The 2017 revision of Cadence’s Sigrity product introduces several features specifically designed to speed up PCB power and signal integrity signoff. In 2016, Cadence expanded the portfolio with an upgraded serial link analysis flow including an IBIS-AMI modeling-building technology, USB 3.1 (Gen 2) compliance kit, and cut-and-stitch model extraction technology to segment long serial links into sections that should be modeled using 3D full-wave and sections that can be modeled using hybrid extraction technology. In 2015, Cadence released the Sigrity Parallel Computing 4-pack which enabled efficient product creation with 3X speedup in signoff-accurate PCB extraction, an updated power-aware system signal integrity (SI) feature which supports LPDDR4 analysis with full JEDEC compliance checking, and flexible licensing options.
Products
Sigrity OptimizePI
Sigrity PowerDC
Sigrity XtractIM
Sigrity PowerSI
Sigrity Broadband SPICE
Sigrity SPEED2000
Sigrity XcitePI Extraction
Sigrity SystemSI
Sigrity System Explorer
Sigrity Transistor-to-Behavioral Model Conversion (T2B) Allegro Sigrity SI Base Allegro Sigrity PI Base
Notes
References
"National Science Foundation SBIR Award", An Ultra-Fast Signal Integrity Analyzer for Multi-Layer Electronic Packages and Boards, January 1, 1997. "SI Problems", Book Chapter, Engineering Electromagnetic Compatibility, 2nd Edition, IEEE Press & John Wiley & Sons, Inc., 2001. "EDN Hot Product Award", EDN, December 14, 2007. "Packaging Goes Vertical", EE Times", November 24, 2008. "PCB Signal Integrity, Power Integrity and EMC Challenges", PCDandF, December 2008. "DC Design Squeeze", PCDandF'', January 2009.